A STATIC CURRENT SHARING METHOD FOR PARALLELED SiC MOSFETS
Liu Xingyu1, Du Mingxing1, Yin Jinliang1, Ouyang Ziwei2
Author information+
1. Tianjin Key Laboratory of Control Theory & Applications in Complicated System, Tianjin University of Technology, Tianjin 300384, China; 2. Department of Electrical Engineering, Technical University of Denmark, Lyngby 2800 Kgs, Denmark
In high current applications such as photovoltaic power generation or wind power generation, due to the static unbalanced current resulting from the mismatch between the power source parasitic inductances and that between the drain parasitic inductances respectively, a static current sharing method for paralleled SiC MOSFETs is proposed in this paper. This paper analyses and solves the problem of the dynamic unbalanced current resulting from the mismatched threshold voltage firstly. And then the problem of the dynamic unbalanced current caused by the mismatched source parasitic inductance is solved on the basis above. Finally, the problem of the static unbalanced current caused by the mismatched drain parasitic inductance is solved on the basis that there is no the dynamic unbalanced current caused by the mismatched threshold voltage and the mismatched source parasitic inductance. The effectiveness of the static current sharing method proposed in this paper is verified by experiments.
Liu Xingyu, Du Mingxing, Yin Jinliang, Ouyang Ziwei.
A STATIC CURRENT SHARING METHOD FOR PARALLELED SiC MOSFETS[J]. Acta Energiae Solaris Sinica. 2023, 44(7): 147-154 https://doi.org/10.19912/j.0254-0096.tynxb.2022-0433
中图分类号:
TN386
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参考文献
[1] 王学梅. 宽禁带碳化硅功率器件在电动汽车中的研究与应用[J]. 中国电机工程学报, 2014, 34(3): 371-379. WANG X M.Researches and applications of wide bandgap SiC power devices in electric vehicles[J]. Proceedings of the CSEE, 2014, 34(3): 371-379. [2] 廖兴林, 李辉, 黄樟坚, 等. 温度对SiC MOSFET电流和电压变化率影响分析[J]. 太阳能学报, 2019, 40(8):2368-2375. LIAO X L, LI H, HUANG Z J, et al.Analysis of effect of temperature on dID/dt and dVDS/dt of SiC MOSFET[J]. Acta energiae solaris sinica, 2019, 40(8):2368-2375. [3] 李先允, 卢乙, 倪喜军, 等. 改善SiC MOSFET开关性能的变电压有源驱动电路研究[J]. 太阳能学报, 2022, 43(1): 362-368. LI X Y, LU Y, NI X J, et al.Research on variable-voltage active drive circuit for improving SIC MOSFET switching performance[J]. Acta energiae solaris sinica,2022, 43(1): 362-368. [4] LIM J, PEFTITSIS D, RABKOWSKI J, et al.Analysis and experimental verification of the influence of fabrication process tolerances and circuit parasitics on transient current sharing of parallel-connected SiC JFETs[J]. IEEE transactions on power electronics, 2014, 29(5): 2180-2191. [5] PEFTITSIS D, BABURSKE R, RABKOWSKI J, et al.Challenges regarding parallel connection of SiC JFETs[J]. IEEE transactions on power electronics, 2013, 28(3): 1449-1463. [6] XUE Y, LU J J, WANG Z Q, et al.A compact planar Rogowski coil current sensor for active current balancing of parallel-connected silicon carbide MOSFETs[C]//Energy Conversion Congress and Exposition(ECCE), IEEE, Pittsburgh, USA, 2014: 4685-4690. [7] LI H L, MUNK-NIELSEN S, WANG X F, et al.Influences of device and circuit mismatches on paralleling silicon carbide MOSFETs[J]. IEEE transactions on power electronics, 2016, 31(1): 621-634. [8] ZHANG Z Y, DIX J, WANG F F, et al.Intelligent gate drive for fast switching and crosstalk suppression of SiC devices[J]. IEEE transactions on power electronics, 2017, 32(12): 9319-9332. [9] KOKOSIS S G, ANDREADIS I E, KAMPITSIS G E, et al.Forced current balancing of parallel-connected SiC JFETs during forward and reverse conduction mode[J]. IEEE transactions on power electronics, 2017, 32(2): 1400-1410. [10] MAO Y C, MIAO Z C, WANG C M, et al.Balancing of peak currents between paralleled SiC MOSFETs by drive-source resistors and coupled power-source inductors[J]. IEEE transactions on industrial electronics, 2017, 64(10): 8334-8343. [11] MAO Y C, MIAO Z C, WANG C M, et al.Passive balancing of peak currents between paralleled MOSFETs with unequal threshold voltages[J]. IEEE transactions on power electronics, 2017, 32(5): 3273-3277. [12] ZHAO C, WANG L L, ZHANG F.Effect of asymmetric layout and unequal junction temperature on current sharing of paralleled SiC MOSFETs with Kelvin-source connection[J]. IEEE transactions on power electronics, 2020, 35(7): 7392-7404. [13] ZENG Z, ZHANG X, LI X L.Layout-dominated dynamic current imbalance in multichip power module: mechanism modeling and comparative evaluation[J]. IEEE transactions on power electronics, 2019, 34(11): 11199-11214. [14] CITTANTI D, IANNUZZO F, HOENE E, et al.Role of parasitic capacitances in power MOSFET turn-on switching speed limits: a SiC case study[C]//Energy Conversion Congress and Exposition(ECCE), IEEE,Cincinnati, USA, 2017: 1387-1394. [15] DU M X, XIN J L, WANG H B, et al.Estimating junction temperature of SiC MOSFET using its drain current during turn-on transient[J]. IEEE transactions on electron devices, 2020, 67(5): 1911-1918. [16] WANG J J, CHUNG S H, LI R T.Characterization and experimental assessment of the effects of parasitic elements on the MOSFET switching performance[J]. IEEE transactions on power electronics, 2013, 28(1): 573-590. [17] WANG K P, YANG X, LI H C, et al.An analytical switching process model of low-voltage eGaN HEMTs for loss calculation[J]. IEEE transactions on power electronics, 2016, 31(1): 635-647. [18] LI C M, LUO H Z, LI C S, et al.Online junction temperature extraction of SiC power MOSFETS with temperature sensitive optic parameter (TSOP) approach[J]. IEEE transactions on power electronics, 2019, 34(10): 10143-10152.