SOFT-START SINGLE-PHASE FREQUENCY-LOCKED LOOP WITH DC COMPONENT REJECTION CAPABILITY

Luo Wei; Wang Chenchen

doi:10.19912/j.0254-0096.tynxb.2022-1481

PDF(3715 KB)

Acta Energiae Solaris Sinica ›› 2024, Vol. 45 ›› Issue (1) : 552-562. DOI: 10.19912/j.0254-0096.tynxb.2022-1481

SOFT-START SINGLE-PHASE FREQUENCY-LOCKED LOOP WITH DC COMPONENT REJECTION CAPABILITY

Luo Wei, Wang Chenchen

Author information +

History +

Abstract

Aiming at the problem that the traditional frequency-locked loop cannot reject the DC component of grid voltage, a frequency-locked loop structure based on DC component rejection loop is proposed. In order to improve the dynamic performance of the frequency-locked loop during startup stage and phase angle jump condition, the traditional frequency-locked loop structure is improved to reduce the gain of the frequency estimator loop, achieving fast and smooth phase angle tracking. Finally, a soft-start up single-phase frequency-locked loop which can reject DC component of grid voltage is proposed. Simulation analysis and experimental results show that the proposed structure has good steady-state and dynamic characteristics.

Key words

PV power generation / frequency estimation / synchronization / DC component rejection / soft-startup

Cite this article

EndNote

Ris (Procite)

Bibtex

Download Citations

Luo Wei, Wang Chenchen. SOFT-START SINGLE-PHASE FREQUENCY-LOCKED LOOP WITH DC COMPONENT REJECTION CAPABILITY[J]. Acta Energiae Solaris Sinica. 2024, 45(1): 552-562 https://doi.org/10.19912/j.0254-0096.tynxb.2022-1481

References

[1] 于晓旭. 太阳能光伏发电并网技术的应用探究[J]. 装备维修技术, 2020(2): 183.
YU X X.Research on the application of grid-connected technology of solar photovoltaic power generation[J]. Equipment technology, 2020(2): 183.
[2] 余永奎, 李华, 刘俊峰. 基于固定频率二阶广义积分器的单相锁频环[J]. 电力系统及其自动化学报, 2020, 32(9): 86-93.
YU Y K, LI H, LIU J F.Single-phase frequency-locked loop based on fixed-frequency second-order generalized integrator[J]. Proceedings of the CSU-EPSA, 2020, 32(9): 86-93.
[3] 全相军, 黄仁志, 吴在军, 等. 锁频环的同步坐标系设计与小信号建模[J]. 中国电机工程学报, 2020, 40(14): 4559-4568, 4735.
QUAN X J, HUANG R Z, WU Z J, et al.Synchronous reference frame design and small-signal model of frequency-locked loop[J]. Proceedings of the CSEE, 2020, 40(14): 4559-4568, 4735.
[4] 杨才伟, 王剑, 游小杰, 等. 二阶广义积分器锁频环数字实现准确性对比[J]. 电工技术学报, 2019, 34(12): 2584-2596.
YANG C W, WANG J, YOU X J, et al.Accuracy comparison of digital implementation on the second-order generalized integrator frequency-locked loop[J]. Transactions of China Electrotechnical Society, 2019, 34(12): 2584-2596.
[5] RODRIGUEZ P, LUNA A, RAUL S M A, et al. A stationary reference frame grid synchronization system for three-phase grid-connected power converters under adverse grid conditions[J]. IEEE transactions on power electronics, 2011, 27(1): 99-112.
[6] FEDELE G, FERRISE A.A Frequency-locked-loop filter for biased multi-sinusoidal estimation[J]. IEEE transactions on signal processing, 2014, 62(5): 1125-1134.
[7] 杜雄, 王国宁, 孙鹏菊, 等. 直流分量对正弦幅值积分器同步信号检测方法的影响及其抑制方法[J]. 中国电机工程学报, 2014, 34(24): 4084-4091.
DU X, WANG G N, SUN P J, et al.Effect analysis and eliminating scheme for DC components to sinusoidal amplitude integrators based synchronization signal detection method[J]. Proceedings of the CSEE, 2014, 34(24): 4084-4091.
[8] LIU H W, XING Y, HU H B.Enhanced frequency-locked loop with a comb filter under adverse grid conditions[J]. IEEE transactions on power electronics, 2016, 31(12): 8046-8051.
[9] GOLESTAN S, GUERRERO J M, GHAREHPETIAN G B.Five approaches to deal with problem of DC offset in phase-locked loop algorithms: design considerations and performance evaluations[J]. IEEE transactions on power electronics, 2016, 31(1): 648-661.
[10] KARIMI-GHARTEMANI M, ALI KHAJEHODDIN S, JAIN P K, et al.Addressing DC component in PLL and Notch filter algorithms[J]. IEEE transactions on power electronics, 2012, 27(1): 78-86.
[11] XIN Z, ZHAO R D, MATTAVELLI P, et al.Re-investigation of generalized integrator based filters from a first-order-system perspective[J]. IEEE access, 2016, 4: 7131-7144.
[12] RODRÍGUEZ P, LUNA A, CANDELA I, et al. Multiresonant frequency-locked loop for grid synchronization of power converters under distorted grid conditions[J]. IEEE transactions on industrial electronics, 2011, 58(1): 127-138.
[13] KARIMI GHARTEMANI M, ALI KHAJEHODDIN S, JAIN P K, et al.Problems of startup and phase jumps in PLL systems[J]. IEEE transactions on power electronics, 2012, 27(4): 1830-1838.
[14] GOLESTAN S, GUERRERO J M, MUSAVI F, et al.Single-phase frequency-locked loops: a comprehensive review[J]. IEEE transactions on power electronics, 2019, 34(12): 11791-11812.
[15] RODRIGUEZ P, LUNA A, CANDELA I, et al.Grid synchronization of power converters using multiple second order generalized integrators[C]//2008 34th Annual Conference of IEEE Industrial Electronics. Orlando, FL, USA, 2009: 755-760.